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Associate Professor
Universitat Politecnica de Catalunya
A Stream Processor Front-end
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Description
Title : A Stream Processor Front-end
Area : Computer Science
Language : English
Url : http://www.ac.upc.es/homes/aramirez/papers/tcca2000.ps.gz
Doi : 10.1.1.28.2375
Abstract : This work proposes a new fetch unit model, inspired in the trace processor [8]. Instead of fetching instruction traces, our fetch unit will fetch instruction streams. An instruction stream is a sequential run of instructions, dened by the starting address and the stream length. All branches included in the stream are assumed to be not taken, except for the terminating one, which should be always taken (else, we are terminating the stream prematurely). We will show how stream fetching approaches the four factors determining instruction fetch performance: the width of instructions fetched per cycle, instruction cache misses, branch prediction throughput and branch prediction accuracy. 1 Fetch performance 1.1 Width of instruction fetch All instructions in a stream are consecutive in memory, and a stream contains no taken branches. This makes it very simple to obtain several consecutive instruction cache lines from a multi-banked cache, and simply select the desired instruction ...
Subject : unspecifiedArea : Computer Science
Language : English
| Affiliations : |
Doi : 10.1.1.28.2375
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Alex's Peer Evaluation activity
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- FPeer Evaluation, Publisher, Peer Evaluation.
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- 3A comprehensive analysis of indirect branch prediction
- 3A Highly Scalable Parallel Implementation of H.264
- 2A Comparative Study of Redundancy in Trace Caches
- 2A Low-Complexity, High-Performance Fetch Unit for Simultaneous Multithreading Processors
- 2A Polymorphic Register File Architecture
- 2A Stream Processor Front-end
- 1A Complexity-Effective Decoding Architecture Based on Instruction Streams
- 1A Performance Characterization of High Definition Digital Video Decoding Using H.264/AVC
- 1Abstract Software Trace Cache *
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Title of the work: Instruction Fetch Architectures and Code Layout Optimizations
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- FPhilippe Fournier-Viger, Assistant Professor, Dept. of Computer Science, University of Moncton, Moncton.
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